1. Technical Field
Various embodiments generally relates to a vertical type semiconductor device, and more particularly, to a vertical type semiconductor device and a method of fabricating the same.
2. Related Art
The distribution rate of portable digital devices has been increasing day by day and ultra-high integration, ultra-high speed, and ultra-low power of memory devices, which are embedded in a limited size to process large capacity of data with high speed, have been required.
Studies on vertical memory devices have been actively progressed to meet these demands. Recently, the vertical structures are introduced into resistance memory devices which are spotlighted as next-generation memory devices.
The resistance memory devices are devices which select a memory cell through an access device, change a resistance state of a data storage material electrically connected to the access device, and store data. There are typically phase-change random access memories (PCRAMs), resistance RAMs (ReRAMs), magnetoresistive RAMs (MRAMs), and the like as the resistance memory devices.
Diodes or transistors may be employed as the access device of the resistive memory devices. In particular, the threshold voltage of the transistors is controlled to be low as compared with the diodes and thus the operation voltage thereof can be reduced, and the transistors have received attention again as the access device of the resistance memory devices by applying the vertical structure thereto.
That is, since the voltage of 1.1 V or more has to be applied to the diodes, there is a limitation to reduce an operation voltage of the diodes. Further, when the diodes are formed on a word line, a resistance of the word line is varied according to locations in the cells to cause word line to be bounced.
Since transistors in the related art are formed in a horizontal structure, the reduction rate is restricted. However, the vertical transistors can sufficiently ensure current drivability in the limited channel area. Further, voltage drop due to an external resistance component may be improved through reduction in a source resistance.
However, when a current vertical structure transistor is formed, a vertical structure transistor is formed by etching a semiconductor substrate in a cell area and a horizontal structure transistor is formed in the semiconductor substrate in a peripheral area. Therefore, desired degree of integration may not be obtained in a subsequent process due to a step between the cell area and the peripheral area. Further, there is a need for an alternative to compensate current drivability of the transistor lower than the diode.